參考：
What is MIM capacitor and why do we need them?

后端設(shè)計(jì)中的特殊cell大盤點(diǎn)

后端設(shè)計(jì)中的特殊cell大盤點(diǎn)

最后介紹一下MIMCAP，其中MIM指的是Metal-Insulator-Metal，這是一種特殊類型的用來提供電容的cell，區(qū)別于DECAP的主要特點(diǎn)是電容量較大，大小也比一般的std cell要大很多，而且使用的金屬層一般比較高，可以重疊放在絕大部分類型的cell上而不產(chǎn)生DRC。

在工具中可以通過直接create cell的方法來插入MIMCAP：

icc2\_shell> create\_cell $mimcap\_name $mimcap\_ref

innovus> addInst -cell $mimcap\_ref -physical -inst $mimcap\_name 

Low Power Design & Optimization using Multi BIT flops and MIMCAPs in 16nm technology and below

Low Power Design & Optimization using Multi BIT flops and MIMCAPs in 16nm technology and below

What is MIMCAP?

Metal-Insulator-Metal (MIM) capacitors are parallel plate capacitors formed by two metal films. There is a thin insulating dielectric layer between Capacitor top metal- CTM and capacitor bottom metal- CBM layers. These MIM layers are made from Al, AlCu alloys, TiN, Ti, TaN, and Ta. While dielectric layers are made from silicon nitride or silicon oxide.

Why MIMCAP is needed?

The geometry scaling has led to thinner interconnects and reduced metal width. Interconnect lengths were also increased along with switching at gigahertz speeds to meet complex ASIC design requirement. The device scaling has increased the density of integrated transistors on the semiconductor wafer (Silicon). There may be large current spikes due to simultaneous switching within short periods of time, which can cause the current resistance drop, voltage fluctuation and noise on the power supply network. These will affect reliability, speed and signal integrity. The addition of on-chip decoupling MIMCAP compensate voltage fluctuations by supplying charges to the power network. However, the capacitance must be large enough to meet the requirement.
通過加入MIMCAP來補(bǔ)償電壓波動(dòng)。
驗(yàn)證了上面的說法，MIMCAP cell區(qū)別于DECAP cell的主要特點(diǎn)是電容量較大。

MIMCAP Structure

In 16nm project, the MIMCAP was placed between Metal 12 and Metal 11.A Metal-Insulator-Metal Capacitor (MIMCAP) uses a cut layer (V11) that connects a metal layer M12 to metal layer M11. The cut layer (V11) connects top layer metal layer M12 to intermediate layers CBM and CTM. The intermediate layers (CBM and CTM) are defined in the technology file with the MIMCAP function.


Above figure shows 4X4 MIMCAP of size 46×55 um^2.The cell cap is 42pF and Cap Density = 42700fF / (46.08*55.296 um^2) = 16.8 fF/um^2.

It is a cover cell. It has via11 obstruction in MIM region and M11 obstruction under MIM vias. It has no CTM/CBM shapes. Coupling to CTM/CBM seen only in extraction.

Where to Add?

MIMCAP cells are added to the blocks after power grid insertion. Decap cells are still required. MIMCAP doesn’t replace decaps, it rather adds to it.It is recommended to add these to places where there is little or no metal11 routing, since coupling to metal11 won’t be seen until extraction. It is recommended adding over high current density areas, such as TCAMs, high density or frequency logic areas, etc. There are placement rules regarding MIMCAP and die edge. Recommend >400u away from die edge.

Conclusion:

In our 16nm networking chip of 22*15 mm size with mentioned usage of MBIT flops and MIMCAPs, we got significant clock/data dynamic power improvements and extra 750pF decap with cost of extra manufacturing mask layer.

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